Increasing Radiation Tolerance of Field-Programmable-Gate-Array-Based Computers Through Redundancy and Environmental Awareness

A SCOMPUTING systems have grownmore powerful, with a concomitant shrinking of their operational circuitry, the possibility of radiationinduced faults in the hardware has become an ever more pressing concern. This is especially true for systems that must operate outside the protection of the Earth’s atmosphere and magnetosphere. Spacecraft and planetary rovers must balance their computing performance requirements against the necessity of maintaining reliability in a more intense radiation environment, because radiation-tolerant hardware generally costs more and lags behind the industry standard for performance [1]. This paper presents work intended to help make these tradeoffs more favorable for space systemdesigners by enabling the reliable use of fast, comparatively inexpensive, commercial off-the-shelf (COTS) parts. Reliability is achieved through a combination of redundancy, repair, and environmental awareness. Of late, much attention has been focused on static random-access-memory (SRAM)-based field-programmable gate arrays (FPGAs) as computing platforms for space vehicles. The reconfigurable nature of these devices essentially allows them to morph into different specialized computing systems over the course of a mission, or serve as universal spares. Thus, they combine the high performance of customized hardware with the flexibility of traditionalmicroprocessors. Since one FPGAcan serve its spacecraft inmultiple capacities, they have the potential to greatly reduce weight and space requirements for the mission. FPGAs also allow spacecraft designers to upload new configuration data (essentially modifying the hardware) after launch if an error is found or the mission requirements change. SRAM-based FPGAs can bring many benefits to a space mission, but their use also carries unique challenges. When ionizing radiation strikes the SRAM inside an FPGA, it can change logic states that control the configuration of the circuitry, effectively changing the hardware and creating erroneous outputs. To correct such errors, one must overwrite the faulty configuration memory; simply resetting the device will not return it to normal operation. FPGAs that use a different type of configuration memory can avoid these problems, but they cannot compare to SRAM-based FPGAs in their versatility. Antifuse FPGAs can only be programmed once, which limits their use as reconfigurable computers. FPGAs based on flash memory do not support partial reconfiguration [1], which severely limits the versatility of fault mitigation techniques and the modularity of the reconfigurable computing approach. To improve the reliability of an SRAM-based FPGAwithout building the entire system from slower radiation-tolerant hardware, onemustmake use of an architecture that employs techniques based on redundancy and/or repair to avoid errors. One such technique is triplemodular redundancy (TMR). TMR triplicates the computational hardware and adds circuitry that determines the final output by majority vote. If any one of the three computational modules experiences a fault, the two goodmodules will overrule it. Initially, TMR is more reliable than a simplex (single module)